Interconnect, Assembly, & Packaging

Objective: To develop and implement assembly and packaging processes that integrate hybrid components to achieve high-yield, low-cost, and reliable flexible wearable electronic systems and demonstrators.

Approaches: Innovative pick and place processes, compliant interconnects, precision assembly and attachment, curing and reflow processes.


Compliant Interconnects




Advanced 3D interconnects




Fully inkjet-printed capacitors on a flexible Kapton substrate.(a) Equivalent capacitance simulation and measurement curves for thin (PVP) and thick (SU-8) printed dielectrics.(b)



Nanocomposite Supercapcitor Fabric


Reliability testing of integrated capacitors


Ultra-thin power inductor

Ultra-fine RDL with glass package


High-density and flexible glass packages with 30 micron core


  • Compliant Pitch Interconnects

When thinned devices are attached to flexible substrates, the interconnects need to be compliant to be able to accommodate the differential displacement due to CTE mismatch or to facilitate stretching, twisting, or bending of the flexible substrates.  Our research focuses on several off-chip compliant interconnects that can be used to attach the chips to the substrates.  Optimized for electrical performance and mechanical compliance as well as manufacturability, the suite of compliant interconnects provides an effective way of attaching thinned devices onto flexible substrates.

  • Advanced 3D Interconnects

Several breakthroughs are recently reported by GT-PRC in manufacturable, low-cost and high-reliability interconnection  and assembly technologies, addressing the following key needs in emerging consumer, high-performance and automotive applications:

  • Advanced materials, tools and processes to improve throughput and performance of conventional reflow and  thermocompression bonding
  • Pitch scalability below 20µm for  high-performance applications
  • High-current density (0.5–1´106A/cm2) interconnections for high-end digital, analog and high-power packaging
  • Thermal stability  to 250°C for high-temperature automotive electronics

Georgia Tech PRC and its industry partners pursue their efforts towards manufacturable and low-cost all-Cu interconnections with two unique approaches. The first approach relies on the use of ENIG and EPAG surface finish to prevent Cu oxidation and enable assembly at <200°C by thermocompression, thermosonic or mixed bonding. Novel surface finish metallurgies, low-cost planarization processes and assembly strategies are demonstrated and optimized for performance, reliability and manufacturability. Advanced all-copper interconnections are being developed for scalable fine-pitch interconnections and also high-temperature and high-current needs. This is enabled by a breakthrough nanocopper foams as an alternative solution to replace the solder cap. This novel concept can be scaled to pitches down to 20µm and below as it is essentially a solid-state process, while the sub-20GPa modulus of the foams substantially improves tolerance to non-coplanarities and warpage compared to existing direct Cu-Cu bonding solutions.

  • Batteries- Solid State Flexible Energy Storage Devices

Dr. Gleb Yushin’s group has developed the in-depth expertise needed for the formation of flexible batteries and supercapacitors with a combination of high energy, high power and remarkable mechanical properties. Via changes in the architecture of the energy storage building blocks, the group has developed flexible nanocomposite battery electrodes exhibiting a 150% increase in capacity, compared to state of the art commercial anodes, and flexible and ultra-strong nanocomposite supercapacitor electrodes exhibiting a 300% increase in energy storage. These developed composites also display an ultra-high strength and modulus of toughness that exceed that of the most widely used lightweight structural materials, including Al alloys and metal matrix composites.

We propose to develop new technologies for the fabrication of solid-state flexible Li-ion batteries for seamless integration with flexible electronics. Our proposed battery design will be based on flexible ceramic nanowire-reinforced solid polymer electrolytes, carbon fiber – based anodes and cathodes based on carbon nanotube (CNT) coated with active materials to be deposited using chemical vapor deposition (CVD) methods. Our research aims to produce solid state batteries that are mechanically robust and offer greatly enhanced safety characteristics compared to currently available commercial Li ion batteries.



  • Transition Metal Oxide - Carbon Nanocomposites for Supercapacitors

The Yushen group is investigating the Utilization of  Atomic Layer Deposition (ALD) to deposit thin layers of Metal oxide on CNT and other porous carbons. In this process, Precursor and other sources vapors are pulsed into the chamber one at a time, separated by purging or evacuation periods.  In an ideal case ALD is a surface-limited process, the average coating thickness or the average tube diameter should increase proportionally to the number of the ALD cycles. An ImageJ software analysis of multiple SEM micrographs post-processing reveals a linear increase in the average tube diameter with the number of ALD cycles, suggesting that the time allocated for the diffusion of the precursor gases into the porous structure in each cycle was sufficient for the reaction to be surface kinetics-controlled.

  • Integrated Capacitors - Integrated Tantalum Capacitors

Integration of power convertors with the load results in several benefits such as better efficiency and performance through fine-grain power distribution, system miniaturization, increased reliability and even lower cost. Ultra-thin and integrated storage components such capacitors are the biggest barrier to realize such architectures. Current approaches to address this problem involve thinfilm MIM capacitors, trench capacitors, embedded discrete MCCCs or landside MLCCs. GT-PRC demonstrated a new concept towards silicon-integrated, thinfilm, high-density capacitors for integrated power modules using high-surface area films. The capacitors in form-factors of less than 75µm showed stable capacitance densities of more than 1 µF/mm2 with leakage of less than 0.1 µA/µF at 3 V. To the best of authors’ knowledge, this is the highest capacitance density reported till date at the mentioned form-factors. Furthermore, these capacitors are integrated directly above the active silicon, enabling shorter interconnection path with lower system parasitics, leading to higher switching frequencies and lower losses. These ultra-miniaturized, substrate-compatible tantalum capacitors, thus, address the strategic need for highly-efficient, ultra-miniaturized power modules.

  • Inductors- Integrated Inductors

Power-supply inductors are primarily based on ferrites, and are surface-mounted as discrete components. This results in higher parasitics, thus degrading system performance. Their larger component thickness creates additional challenges with respect to component embedding. Integrated inductors provide performance and miniaturization benefits compare to discrete thick ferrite inductors because of their suppressed parasitics and reduced board or package real estate. They can be nonmagnetic or combined with magnetic materials to enhance the inductance and reduce the size. The final goal for integrated inductors is to miniaturize inductors as thinfilms, but well-within the IC footprint. Magnetic composites, comprising magnetic metals which provide high permeability and saturation magnetization and polymers which provide high resistivity to reduce eddy current losses are ideally suited for low-cost package integration. Ultra-thin power inductors with low DC resistance of 5 milliohms and high inductance density are developed with innovative and low-cost panel-compatible processes.

  • Substrates - Flex Substrates with Ultra-high Functional Density

GT-PRC is pioneering high-density flex substrates with integrated digital, power, RF, sensing and photonic functions for consumer, defense, medical and automotive industry needs. Ultra-thin flex laminate substrates are developed with glass and organic cores. Of these two core options, laminates with glass core are more attractive because of their superior electrical properties such as low electrical loss, thermal expansion matching Si, smooth surface finish, no-moisture absorption, and availability in ultra-thin and large form factors without having to grind. Migrating this to 50 micron glass core thickness, GT-PRC demonstrated the first flexible highly-integrated glass substrate technology as shown in the figure to the left.

With innovative designs, materials and process, the three fundamental limitations of glass - low thermal conductivity, through-silicon-via (TSV)-like through-via formation at fine pitch at low cost, and mechanical brittleness were successfully addressed. GT-PRC and its partners developed high throughput small through-package-vias (TPV) holes and metallization processes as well as low-cost RDLs with 2-5 micron wiring (as shown in figure to the left) leading to 20-40 micron I/O pitch on both sides of thin glass. With these basic research demonstrations, Georgia Tech also began to pioneer a new 3D system package architecture, interconnecting chips with shortest interconnect lengths and potentially unlimited I/O density enabled by TSV-like Cu TPVs but at system level. Low interconnect losses are achieved by reducing dielectric and conductor losses. As a result, line insertion losses for high-speed, off-package interconnects as low as 0.05 dB/mm are achieved—a 6X reduction compared to similar results reported with silicon interposers. High Q and precision RF components such as embedded matching networks, filters and antennas are also demonstrated with PRC’s flex technology. These technologies are adaptable to both glass and organic flex cores.